NVIDIA

Manager, Project Management - Chip Design

Israel, Tel AvivPosted Sep 15, 2026

Requirements at a glance

Manager, Project Management - Chip Design at NVIDIA is a role based in Israel, Tel Aviv. The posting mentions a master's degree. It does not mention visa sponsorship. Key skills include Project management. Applications are submitted through Workday.

Education
Master's degree (mentioned)
Visa sponsorship
Not mentioned in the posting
Application platform
Workday

Skills in this posting

  • Project management

Extracted automatically from the job description. Confirm details in the full posting below.


NVIDIA's Switch ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development of NVIDIA's most advanced and complex switch ASICs — from concept to tape-out — and drive the chip through power-on and qualification to production release. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams.


What you'll be doing:

  • Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.
  • Post-Silicon Execution: Drive chip power-on, bring-up, and qualification to production release.
  • Execution Plans: Define and implement execution plans in collaboration with cross-discipline leaders in unit-level, full-chip, physical design, and firmware/software emulation.
  • Roadmap Definition: Contribute to the definition of NVIDIA's switch ASIC roadmap.

What we need to see:

  • BS or MS in Computer or Electrical Engineering, or equivalent experience.
  • 10+ overall years of experience in chip design.
  • 5+ years of chip design/verification management experience as a second- or third-level manager, leading organizations of 50+ engineers.
  • Proficiency in RTL design (Verilog), verification (UVM, SystemVerilog), System-On-Chip design/integration flow, and design automation.
  • Strong system view with the ability to collaborate across multiple interfaces.
  • Strong analytical and problem-solving skills.
  • Excellent communication and teamwork abilities.
  • Experience in synthesis and physical design is a plus.

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