Senior Staff SW Dev Engineer
Lattice Overview
There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.
Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.
Job Description:
A successful candidate will join a team designing and developing Lattice FPGA software tools at Penang. The candidate will lead research, design and development of FPGA primitives, Foundation IP, IP Catalog tooling as well as helping to refine Product Life Cycle e.g. planning, development & testing processes. The candidate is expected to play a lead role in cross-functional teams to plan and coordinate Lattice FPGA software release cycle including requirement analysis, feature scoping, development, testing and validation.
Requirements & Skills
Bachelors, Masters or better in Computer Science, Computer Engineering, Electrical Engineering, or related fields with 12+ years of experience in EDA SW Tool development .
Experience
Strong communication skills.
Knowledge or experience in FPGA architecture and FPGA software tools, specifically for device modeling and soft IP development.
Programming skills (C++ and Python).
Hands-on experience in FPGA RTL design, testbench development, logic verification, timing closure and debugging.
Preferred
Expert in multi-domain FPGA primitives such as embedded block RAM, DSP blocks, PLL, oscillators, I/O Gearing, configuration/security or power related silicon features.
Behaviors/Motivations
Technical leadership: Serves as a recognized technical authority who shapes Foundation IP technical roadmap across cross organization engineering decisions/efforts.
Accountability: Owns outcomes spanning multiple projects or releases, accountable for delivery, quality and sustainability while making explicit trade-offs to protect long term technical health.
Execution: Proactively identifies organizational and technical risks early, drives cross-team alignment, and leads resolution of complex execution challenges that span teams or functions.
Mentorship: Creates organizational leverage by mentoring engineers, developing technical leaders, setting technical direction, and establishing best practices adopted broadly and sustained over time.
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in:
MalaysiaLattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.
Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.